Xilinx Virtex-6 HXT FPGAs target optical transceivers

Xilinx has validated Virtex-6 HXT FPGAs interoperability with such optical transceiver suppliers as Avago Technologies. "Avago Technologies is pleased to offer optical transceivers compatible with Virtex-6 FPGAs for standards including 10-Gbps Ethernet," said Victor Krutul, director of marketing, Fiber Optics Product Division at Avago. "With over 30 years of experience in optical interconnects as part of HP and Agilent, Avago is uniquely able to help FPGA designers make the move from copper to fiber-optic interconnects as connection speeds move to 10 Gbps and beyond."

Xilinx Virtex-6 HXT devices are designed to seamlessly interface to industry standard SFP+, XFP, and CFP optical modules at line rates up to 11.18 Gbps, addressing next-generation optical transport application needs. Furthermore, through its jitter performance -- less than 500 fs rms random jitter at 11.18 Gbps, Xilinx says -- and signal integrity, the need for external conditioning circuitry is eliminated. The jitter performance provides the system designer the margin required to build robust high speed interfaces, the company says.

Optimized for applications that require ultra high-speed serial connectivity, Virtex-6 HXT FPGAs offer what Xilinx claims is the industry's highest serial bandwidth through a combination of 6.6-Gbps GTX transceivers and 11.18-Gbps GTH transceivers to enable packet and transport, switch fabric, video switching, and imaging equipment.

Other Virtex-6 HXT device features include:

• A design optimized for 10G signaling, including Transmit (Tx) pre-emphasis, Receive (Rx) linear equalization and Decision Feedback Equalizer (DFE) to meet tough jitter requirements.
• Lower jitter with “superior” DFE and EQ circuits, higher total transceiver count, more BRAM, and a high number of SERDES capabilities.
• Design topology that isolates the high performance analog circuits from the noisy digital logic and IO to improve noise performance.
• A package design with all serial pins isolated from parallel IO, in-package power planes and capacitors, and a sparse-chevron pinout resulting in 40 dB of isolation between Tx and Rx and 30 dB of isolation between channels.
• Overall, the Virtex-6 HXT device performance enables the designer to interface to optical modules directly without the need for external re-timers.

Built on 40-nm process using third-generation Xilinx ASMBL architecture, the Virtex-6 FPGA family is supported by a new generation of development tools and a large library of IP to ensure productive development and design migration. The devices operate on a 1.0 V core voltage with an available 0.9 V low-power option.

Virtex-6 HXT FPGAs are shipping today and customers can start their designs immediately with the ISE Design Suite version 12.3. Detailed pricing information for Virtex-6 HXT FPGAs is available through Xilinx sales offices and distributors.

Posted by SFPlus Transceiver, the manufacturer of optical transceivers.